10:32 Running Quake on RISC V with Virtual Platforms - Kevin McDermott, Imperas Software Ltd RISC-V International
14:27 NOEL-V, a Configurable 32-Bit and 64-bit RISC-V IP - Christian Sayer, Cobham Gaisler RISC-V International
11:58 Customizing RISC-V Cores to Accelerate Neural Networks - Jon Taylor, Codasip RISC-V International
13:15 Introduction to RISC-V Processor Verification - Larry Lapides, Imperas Software Ltd RISC-V International
17:38 The Next Step in Low Energy Edge DSP and AI - Martin Croome, GreenWaves Technologies RISC-V International
13:06 Design for Differentiation: Architecture Licenses in RISC-V - Filip Benna, Codasip RISC-V International
7:22 Developing Containerized RISC-V Applications with Ubuntu - Heinrich Schuchardt, Canonical RISC-V International
10:40 Getting Started with RISC-V Custom Instructions - Larry Lapides, Imperas Software Ltd RISC-V International
14:17 I Fought the Law and the Law Lost: Moore’s Law, Dennard Scaling & RISC-V - Rupert Baines, Codasip RISC-V International
9:14 Thermal (IR) Imaging Camera including ISP on Polarfire RISC-V FPGA SoC - S Thomas, Digital Core Tech RISC-V International
11:36 Ubuntu Core: A Secured Embedded Linux Distribution for RISC-V - Ondrej Kubik, Canonical RISC-V International
12:00 Securing SiFive Vector Processors with an Open, Scalable Security Architecture - Dany Nativel RISC-V International
12:44 OpenHW CORE-V MCU DevKit for Cloud Connected IoT - Rick O'Connor, OpenHW Group RISC-V International
23:56 Open Acceleration for RISC-V – Portability, Performance and Partners...Charles Macfarlane, Codeplay RISC-V International