2:59 Video Contest - Explain RISC-V to a Non Technical Person by Eleftherios Batzolis RISC-V International
15:42 How to accelerate your career with RISC-V by Calista Redmond, CEO of RISC-V International RISC-V International
2:12:48 Future ISA extension, 3D Object Detection on Autonomous Driving, RISC-V Tech Study Japan 03/16, 2023 RISC-V International
1:54:57 Vector spec 1.0 on RV64GC NS72, RISC-V ISA vs AArch64, etc, RISC-V Technical Study Japan 02/09, 2023 RISC-V International
1:54:35 RISC-V: Snapshot of Latest Work and Research, New York Community Group November 16, 2022 RISC-V International
9:48 What I wish I knew then, that I know now... - Jeff Scheel, RISC-V International RISC-V International
12:10 Stepping into the Lime Light, and the Heat Lamp: Ten Thoughts on Putting Yourself in the Spotlight RISC-V International
2:10 RISC-V: Enabler of an Open Source Hardware Era - Zeeshan Rafique, Usman Institute of Technology RISC-V International
14:28 Duisburg Group -Mar 16, 2022 Accelerating Neural Network Inference with Customized RISC V Extension RISC-V International
18:01 Duisburg Group - March 16, 2022 -Modern Embedded Software Development for RISC V MINRES Technology RISC-V International
13:22 Duisburg Group - March 16, 2022 - Integrating the FABulous eFPGA Framework into the RISC V Ecosystem RISC-V International
9:06 Implementing Vectorised 2D Correlation using MLIR - Prathamesh Tagore, RISC-V Mentee (India) RISC-V International
24:06 RISC-V Duisburg Group - RISC V for embedded AI and reconfigurable Computing RISC-V International
18:49 RISC-V Duisburg Group - Making an authentication token IC based on the Opentitan Project RISC-V International
14:59 Duisburg RISC V Community Group - PUF for reliable identification of RISC-V cores RISC-V International
33:51 Duisburg RISC V Community Group - Creating and Verifying Custom RISC-V Instructions RISC-V International
1:05:02 The Real Challenge for RISC-V Vector Processors - Online August 18, 2021 RISC-V International
57:11 Implementing RISC-V ISA for quantum computer and "qlang" compiler, Niisato, 2021 05/21 RISC-V International
29:02 1. Duisburg RISC-V Group meetup - RISC-V SoC Architecture: Exploration for AI & ML SiliconPoetry
22:12 1. Duisburg RISC-V Group meetup - Rad-hard microcontroller for high-energy physics experiments SiliconPoetry
14:31 1. Duisburg RISC-V Group meetup - MiG-V: Made in Germany RISCV-based Logic Locked SoC SiliconPoetry
38:42 RISC-V Twin Cities: Building a high powered AI/ML accelerator with RISC-V, John Min - 2020 06 17 RISC-V International
35:36 RISC-V Israel Meetup - AI: Scale from Edge to Server with RISC-V and Linux - Florian Wohlrab, Andes RISC-V International
23:27 RISC-V Bay Area Meetup: Applications - RISC-V in Avionics, Bertrand Tavernier, Thales Group RISC-V International
21:39 RISC-V Bay Area Meetup: Applications - Where they are using RISC-V, Frans Sjistermans, NVIDIA RISC-V International
18:44 RISC-V Bay Area Meetup: Applications - Motor Control Applications, Onno Martens, Trinamic RISC-V International
1:42:19 RISC-V Meetup: Production Grade, Open RISC-V SweRV Core Solutions in CHIPS Alliance, May 20, 2020 RISC-V International
1:17:41 RISC-V Service Tools Virtual Meetup - RISC V Israel meetup, April 23, 2020 RISC-V International
1:17:17 RISC-V Seattle Meetup: RISC-V P-ext and V-ext and custom instructions for AI and ML applications Andes Technology
1:14:44 Cache Coherent Memory Fabric based on RISC-V - RISC-V Bay Area Meetup, April 20, 2020 RISC-V International
